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TNguy162's avatar
TNguy162
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6 years ago

Issue of using F2H bridge on Arria 10 to access H2F_LW.

Hi everyone,

I have an issue related to using F2H bridge to access registers on FPGA via H2F_LW bridge.

As I read from the Arria 10 HPS technical reference manual, from the address table of page 378, I thought that F2H bridge can access to slaves of H2F_LW from address 0xFF200000 to 0xFF400000. Is this right?

When I send a read or write command to this address area, I found that there is no command on H2F_LW. Maybe my command was blocked somewhere by HPS. HPS did not forward my commands to H2F_LW as I want it to do. Do I need any setting for H2F_LW bridge? Or any setting on HPS that I need before sending commands?

Any advice is highly appreciated.

Thank you.

Best Regards,

Joe

12 Replies

    • TNguy162's avatar
      TNguy162
      Icon for New Contributor rankNew Contributor
      6 years ago

      Hi el.ign,

      Sorry for a late reply.

      I read the device guidelines but I cannot find the reason why I cannot send a command from f2h bridge to h2f_lightweight since we have the address as the above picture.

      We changed our design and don't use f2h bridge anymore.

      Thanks for your information.

      Best Regards,

      Joe

      • EBERLAZARE_I_Intel's avatar
        EBERLAZARE_I_Intel
        Icon for Regular Contributor rankRegular Contributor
        6 years ago

        Hi Joe,

        Thanks for the follow up.

        Based on my knowledge, the h2f_lightweight are intended for control or status registers, there will be an issue when is used for other usage.

        Best Regards.

  • EBERLAZARE_I_Intel's avatar
    EBERLAZARE_I_Intel
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi Joe,

    I am not that familiar with the clock crossing that you mentioned. I believed if the Platform Designer automated the adapter, it should be fine because of the two different clock domain frequencies.

    Was there any issue with the adapter so far?

    • TNguy162's avatar
      TNguy162
      Icon for New Contributor rankNew Contributor
      6 years ago

      Hi el.ign,

      Thanks for your reply.

      I think the same. We ran simulation and tested on board. There is no problem so far but I'm just worried about meta-stability. That happens occasionally and hard to detect on board.

      Best regards,

      Joe

      • EBERLAZARE_I_Intel's avatar
        EBERLAZARE_I_Intel
        Icon for Regular Contributor rankRegular Contributor
        6 years ago

        Hi Joe,

        Let me check for any information I could find and check with out internal team regarding this.

        Best Regards.

  • TNguy162's avatar
    TNguy162
    Icon for New Contributor rankNew Contributor
    6 years ago

    Hi el.ign,

    Fantastic!! I appreciate that.

    Best regards,

    Joe

  • EBERLAZARE_I_Intel's avatar
    EBERLAZARE_I_Intel
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi,

    The automated by the Platform Designer are fine.

    though if happens any error, do not hesitate to file a new case.

    Thanks!

    • TNguy162's avatar
      TNguy162
      Icon for New Contributor rankNew Contributor
      6 years ago

      Hi,

      Thank you very much.

      We have no problem so far.

      Cheers,

      Joe