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Matt1's avatar
Matt1
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

issue in using EMIF interface for A10 SOC evaluation board

i have created design which contains the PCIe with dma and an emif interface in fpga. while trying to compile this design i am facing the following error. "Error(17044): Illegal connection on I/O i...
NurAida_A_Intel's avatar
NurAida_A_Intel
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Dear Matt,

Please accept my apology for the delay in response due to current workload.

When I compiled the design, I'm getting this message as below which is different from what you've encountered.

Error (17045): Input port I of I/O input buffer primitive top_hw|emif_1|emif_1|arch|arch_inst|bufs_inst|gen_mem_alert_n.inst[0].b|no_oct.ibuf is not connected. It must be driven by a top-level pin.

I double check on the mem_dqs and rzq connection and seems like the signals is OK.

I noticed that in your top level file (top.v), the mem_alert_n pin is not exported. After I exported this pin to the top level file, the design able to compile successfully. Attached is the QAR project for your reference.

Please try to run the design and let me know if this solved your problem.

Thanks

Regards,

Aida