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Altera_Forum's avatar
Altera_Forum
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15 years ago

Is there any virtual jtag C API functions?

Dear All,

I am using Altera Virtual Jtag to develop my own debug tool on FPGA.

I notice that on host PC, I have to write Tcl script and evaluated it through quartus_stp.exe shell program in order to access my Jtag controller in FPGA. I am wondering if Altera provide any C DLL files that contains APIs that I can invoke in my C program to access Jtag in FPGA? Since my debug software is written in C, I am afraid invoking quartus_stp.exe shell in C is not a good solution.

Thanks in advances!

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Thanks for your information. I will look at the post your provide in detail.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    The post is intended for Jtag UART, but not Virtual Jtag.

    Virtual Jtag use sld_hapi.dll file, but it's API function is unkown.
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    --- Quote Start ---

    Virtual Jtag use sld_hapi.dll file, but it's API function is unkown.

    --- Quote End ---

    Yes, that's discussed in the said and other previous threads. JTAG UART is one of many virtual JTAG functions. The basic virtual JTAG interface is documented by Altera, but the interface in the Quartus JTAG stack (particularly sld_hapi.dll) isn't. Of course, this doesn't mean, that you can't use it, but it's not easy.

    P.S.: My personal opinion in this regard is, Altera should officially undisclose a virtual JTAG API, because it's a strong Quartus feature that can be utilized as a competitive edge.
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    --- Quote Start ---

    Altera should officially undisclose a virtual JTAG API, because it's a strong Quartus feature that can be utilized as a competitive edge.

    --- Quote End ---

    I agree. So I can just wait for more information from Altera for its JTAG API.

    I currently use quartus_stp.exe Tcl shell to access Virtual Jtag interface in FPGA, and my C application communicates the Tcl shell through a pipe. This works well, but I am afraid it is less efficient, since running a Tcl command is always slower than running a C command.
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Perhaps it would be helpful if more customers request this information from support and field application engineers. In 2008, Altera decided to include a detailed JTAG Hub protocol documentation in V2.0 release of the Virtual JTAG Megafunction users guide, a piece of information that has been asked before by customers repeatedly.

    http://www.alteraforum.com/forum/showthread.php?t=4293

    It turned out, that the information had been undisclosed before in an Altera patent application, a place where no one expected it.

    http://www.alteraforum.com/forum/showthread.php?t=1686

    P.S.: Actually, I meant that the information has been disclosed by Altera before.
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    But is there any method of exercising the JTAG pins of the buried SOPC from the top level of a design in a RTL simulation?

    I recognise the system console commands in the provided example, but this is for the actual device isn't it? (exercising a programmed device for real).

    This method would be fine for what I am tring to do, but I need to exercise the buried SOPC registers through the JTAG UART SOPC component in a RTL simulation (using my VHDL testbench and/or TCL if possible).

    Please advise.

    Thanks,

    Winston.