Forum Discussion
gyuunyuu
Contributor
ContributorIs there a standard way to store and retrieve "build information" of an FPGA design?
The following things are to be stored inside the FPGA: 1. Build date 2. Build time 3. Build top level file name 4. Build repository commit number for version controlled design 5. Submodule repos...
gyuunyuuContributor
ContributorI have 2 questions
1. qsys-generate is an executable and not a tcl command. What is the preferred way of executing the qsys generation from tcl script (in contrast to command line shell script)?
2. Is Quartus supposed to automatically regenerate the Qsys system for which it has a .qip file when we compile design, or it is the sole responsibility of the user to do this manually?
