Forum Discussion

EMeye2's avatar
EMeye2
Icon for New Contributor rankNew Contributor
6 years ago
Solved

Is Remote Upgrade Circuitry without memory-like IP core possible?

The Cyclone IV, V, and 10 in the Remote Upgrade Circuitry sections make reference to internal signals named RU_DOUT, RU_SHIFTnLD, RU_CAPTnUPDT, RU_CLK, RU_DIN, RU_nCONFIG, and RU_nRSTIMER which is nominally controlled by an available IP core.

However, the wording in these documents make it sound like it is possible to directly connect to the remote upgrade circuitry without using this IP. If this is doable how is this done? Calling a specific parameter such as through a verilog source file? Assignment editor? Chip Planner?

  • ShafiqY_Intel's avatar
    ShafiqY_Intel
    6 years ago

    Hi EMeyes,

    No, it's not possible to Remote Upgrade Circuitry without Flash controller IP core.

    Basically, RSU IP core is used to reconfig, boot image up (image1 or image2)

    and Flash controller IP is used to access the flash (write, read and erase the flash)

    These two IPs is essential in order to design RSU .

    Thanks

3 Replies

  • ShafiqY_Intel's avatar
    ShafiqY_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    6 years ago

    Hi EMeyes,

    No, it's not possible to Remote Upgrade Circuitry without Flash controller IP core.

    Basically, RSU IP core is used to reconfig, boot image up (image1 or image2)

    and Flash controller IP is used to access the flash (write, read and erase the flash)

    These two IPs is essential in order to design RSU .

    Thanks

    • YTSAI_Cisco's avatar
      YTSAI_Cisco
      Icon for New Contributor rankNew Contributor
      6 years ago

      What is the formal name of "Flash controller IP core" you mentioned ? I'm trying to locate it in IP catalog.

      And what documents described the detail usage of RSU IP core on Cyclone IV ?

      Thank you~

      • EMeye2's avatar
        EMeye2
        Icon for New Contributor rankNew Contributor
        6 years ago

        In Quartus,

        Tools -> IP Catalog

        In IP Catalog,

        Library -> Basic Functions -> Configuration and Programming -> Remote Update Intel FPGA IP

        https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_altremote.pdf

        This is used to reset the watchdog timer function built-in and starting reconfiguration based upon parameters you set during user mode with this IP. As far as selecting between various images this IP would be required. Depending upon how one wishes to reconfigure flash this IP might not be needed. One could erase flash and overwrite the flash at base address zero without any backup, but this carries the risk of not being able to recover from a poorly written flash or power cycle during the writing. Plus, you still need a way to start the reconfiguration process which if a simple power cycle is sufficient that could be done.

        There are a few flash controllers, so I am not sure the one being referred to at all. I believe various could be used to achieve a similar result. I will say it is possible to set-up a Quartus project to use the active serial pins such as dclk, cs, data0, etc. as user I/O (this is under the Dual-Purpose Pins" section). Meaning one can make their own flash controller if a custom interface is needed or you already have something designed.