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Altera_Forum's avatar
Altera_Forum
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8 years ago

Is my design using 'hard' multipliers? How do I find out? How do I force it?

I've got following (below) Verilog module. When I compile it i see no DSP blocks etc used in the report. How can I tell if it is using a hardware multiplier and if not how can I force it...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Thanks for the tips. I've reworked my stuff and the DSP block is now correctly inferred according to the syn report.