Forum Discussion
Altera_Forum
Honored Contributor
17 years agoIs it possible to write this?
Hello, I have to write a VHDL code in which i wrote case statement two times for the same FSM states(case statement was in fact interrupted by an if statement).Please look at the underlined lines ...
Altera_Forum
Honored Contributor
17 years agoNo it's not this what i need.I want to have the states within if statement looped together for 16 times on a row.
Take a look at this FSM schematic: https://www.alteraforum.com/forum/attachment.php?attachmentid=1284