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JBoot1's avatar
JBoot1
Icon for New Contributor rankNew Contributor
6 years ago

Is it possible to use the FLR for the HIP PCIe AVST core to reset logic?

I have an endpoint design which uses the hard IP PCIe avalon-st core with multiple functions. One of the functions is used by a VM so I would like to enable the function level reset for that functi...
SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,

The FLR is not available if this is NOT SRIOV, and I don't see the cyclone V has a similar feature as well. Probably you can create custom logic at the endpoint to perform the reset when receiving certain memory write TLP from the Host.

Regards -SK