Is it possible to access loanIO of hps from a fpga ip core with bidirectional IO?

Hi,

I have a customized design which I have routed a NVRAM to SPI pin of HPS side.

Now the software team wants to access NVRAM like a flash. So I'm thinking to use generic flash controller ip core in FPGA to control it. I know it's possible to loan pins from HPS to FPGA.

The issue here is :

The generated conduit signals supposed to connect to FPGA are only unidirectional, see

._hps_io_gpio_inst_LOANIOXX Bi-direction to top level pin assignment
._h2f_loan_io_in Out to FPGA logic
._h2f_loan_io_out In to FPGA logic
._h2f_loan_io_oe In to FPGA logic

But the generic flash control ip has bidirectional IO for data transfer. It seems I can not connect them together. Is there any solution for this? If not, then I have to redesign the board to use FPGA pin instead.

Thank you very much for your time.

Any response/reply is appreciated.

Mingyuexin