Forum Discussion

Mingyuexin's avatar
Mingyuexin
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Is it possible to access loanIO of hps from a fpga ip core with bidirectional IO?

Hi, I have a customized design which I have routed a NVRAM to SPI pin of HPS side. Now the software team wants to access NVRAM like a flash. So I'm thinking to use generic flash controller ip c...
Mingyuexin's avatar
Mingyuexin
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Hi,

Do you have any solution or suggestions on this?

With best wishes

Mingyuexin

EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,

Accord to our Cyclone V SoC Device Design Guidelines, the recommend peripherals that the HPS dedicated IO with loaner are: QSPI, NANDx8,eMMC, SD/MMC, UART,USB, EMAC

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an-cv-av-soc-ddg.pdf#page=17

NVRAM is not entirely supported. But you may check our video tutorial on how to initiate the example of HPS loaner IO using Qsys/Platform Designer here:

https://www.youtube.com/watch?v=cRwzmsJ1Jkg