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Altera_Forum's avatar
Altera_Forum
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8 years ago

is it common to run memory interface at a higher speed than the design?

Is it common to run SDRAM, SRAM and other memory controllers at a higher frequency than the main design, perhaps that is not integer multiple of the system frequency? This shall require use of clock ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Usually, the memory controller will have an interface that is synchronised to the system clock, with internal clocks set up as you need (for bandwidth considerations etc). Clock synchronisation will be done inside the core.