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Altera_Forum
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12 years ago

Is CONF_DONE read by the FPGA?

Hi All, I'm debugging a board with a Cyclone IV device where the CONF_DONE pin was inadvertently left floating. The FPGA configures fine over JTAG but when configuring from EPCS it reads the w...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Hi Mark,

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This would seem to be the case. I took a similar board (Cyclone III, EPCS64) and removed the pull-up from the CONF_DONE line. The behaviour became the same: downloads all the configuration data from the EPCS64, toggles the nStatus line, and starts over. Repeat. I put the resistor back and it configured fine. So it looks like the CONF_DONE line is bidirectional and the FPGA itself checks the status and restarts configuration if there's no pull-up and the line doesn't go high.

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Ok, nice detective work!

As another confirmation that the FPGA can read CONF_DONE, I was recently looking at the JRunner source, and in that code, via the JTAG port, you can issue the CHECK_STATUS JTAG instruction and read a CONF_DONE signal ... whether its the internal version of CONF_DONE or the state of the CONF_DONE pin, I'm not sure, I'll have to run a similar test to you where I change the external pull-up.

Cheers,

Dave