AkshayAyilliathNew Contributor3 years agoIOpll loosing stability in temperature variations Hello I'm using the iopll IP core on my Arria10 FPGA HW. I observe that the output clock generated is getting disturbed with respect to temperature variations - to be specific, the output clock i...Show MoreOscii_plot_iopll_outputCLK.png132 KB
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