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Altera_Forum's avatar
Altera_Forum
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13 years ago

IOE and delay chain?

Can i have a silly question here? :confused:

May i know what is IOE (I/O Elements)?

why delay chain (D1,D2,D3,D4) is always related to IOE?

What is the IOE role in the FPGA?

Thanks,

fpga89

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Yes, you may.

    The IOEs (I/O elements) are the circuitry blocks that actually connect to the FPGA I/O pins.

    They have the I/O drivers (the circuits which let the FPGA interface with TTL, CMOS, LVDS, SSTL, etc external components) and also tend to have some features to improve I/O timing, like dedicated I/O registers and programmable delay chains.
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    --- Quote Start ---

    They have the I/O drivers (the circuits which let the FPGA interface with TTL, CMOS, LVDS, SSTL, etc external components) and also tend to have some features to improve i/o timing, like dedicated i/o registers and programmable delay chains.

    --- Quote End ---

    May i know how the IOE improve the I/O timing? Is it make the delay chain (D1-Dn) either longer or shorter? the delay decide the hong long the data/signal will stay in the I/O pin? what is the purpose of doing this?
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Yes, the delay chain can be made longer or shorter as needed.

    This may be needed to help with hold violations in I/O timing.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    --- Quote Start ---

    Yes, the delay chain can be made longer or shorter as needed.

    This may be needed to help with hold violations in I/O timing.

    --- Quote End ---

    May i know if the delay elements will help setup violation as well?

    Also, how do we determine the delay values? Do we refer to the slack values in timing report to set the delays?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Setup violations are caused by excess delay, so I don't see how the delays can help with setup violations.

    The delays are automatically set by the tool as needed, when you have proper I/O constrains.

    They can also be controlled by user logic, if you have an application where you need to dynamically adjust them.
  • zhy1's avatar
    zhy1
    Icon for New Contributor rankNew Contributor
    10 months ago

    Hello, the device I use is EP4CE10F17C8N. I want to use IOE function to realize programmable delay input and output. How should I call and set it specifically?

  • ShengN_altera's avatar
    ShengN_altera
    Icon for Super Contributor rankSuper Contributor
    10 months ago

    Hi,


    This is an older thread. Please open a new thread for new question.


    Thanks,

    Regards,

    Sheng