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Altera_Forum's avatar
Altera_Forum
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15 years ago

I/O question

If you have an 3.3 volt INPUT pin on an Altera FPGA and you present some mid level voltage such as .5 VCC for an extended period of time, will transistors in the I/O buffer turn on in such a manner that will destroy the device due to excessive current draw?

This is a big engineering dispute in our department. Note that the question refers to an input pin, not tri state or anything like that. In fact, the solution presented by one camp is to change from input to Tri state Output.

Also, note that we have not actually destroyed any devices, this is pure speculation by half or our department. I'm not in that half mind you.

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    --- Quote Start ---

    This is a big engineering dispute in our department. Note that the question refers to an input pin, not tri state or anything like that.

    --- Quote End ---

    The behaviour, whatever it is, must be expected to be the same for all I/Os that expose an input buffer. My assumption is, that a standard complementary CMOS buffer will be actually present for all I/O pins. It may be of course disabled for those I/Os that don't need it, but I would rather expect, that the input buffers are designed with sufficient low saturation current. Thus I assume, that the inputs can tolerate any voltage within in allowed range statically.

    You should be able to measure the supply current change with "analog" input level, and check if it depends on I/O standards and assigned pin function.
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    A 3.3V input buffer with 0.5V driving it will not cause any problems. If setup as a TTL compatible input, it has to accept anything lower than 0.8 V as a valid logic low input.

    Where things get interesting is in the no-mans land between 0.8V and 2.0 V. Here both the P and N transistors are on somewhat, and you will get switch-through current. If the transistors are sized properly, this should never damage the input buffer, but it will cause higher current draw, and may cause oscillations, metastability and other issues for logic on the other side of the input buffer.