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Altera_Forum
Honored Contributor
15 years agoI/O question
If you have an 3.3 volt INPUT pin on an Altera FPGA and you present some mid level voltage such as .5 VCC for an extended period of time, will transistors in the I/O buffer turn on in such a...
Altera_Forum
Honored Contributor
15 years ago --- Quote Start --- This is a big engineering dispute in our department. Note that the question refers to an input pin, not tri state or anything like that. --- Quote End --- The behaviour, whatever it is, must be expected to be the same for all I/Os that expose an input buffer. My assumption is, that a standard complementary CMOS buffer will be actually present for all I/O pins. It may be of course disabled for those I/Os that don't need it, but I would rather expect, that the input buffers are designed with sufficient low saturation current. Thus I assume, that the inputs can tolerate any voltage within in allowed range statically. You should be able to measure the supply current change with "analog" input level, and check if it depends on I/O standards and assigned pin function.