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SK_VA's avatar
SK_VA
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

IO_OBUF Placement and IC delay in timing path

Is there anyways we can constrain the placement of IO_OBUF so that it is closer to the pad. How can we reduce the IC delay in the timing path?
KennyT_altera's avatar
KennyT_altera
Icon for Super Contributor rankSuper Contributor
6 years ago

can u share the screenshot?

1) the resource property editor that show that the register is inside the DDIO location?

2) Timing analyzer report showing the violation

3) the latest .sdc files showing how frequency that you use for that pin

4) what IO standard that you are using