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Altera_Forum
Honored Contributor
Honored ContributorInvalid output from MM--> ST (SGDMA)
Hi, Im wondering if anyone experience this problem before. i was transferring content in my SDRAM to a DCFIFO outside of SOPC using SGDMA. The SDRAM content is all zeros. but after the SGDMA...
Altera_ForumHonored Contributor
Honored ContributorThe problem was solved.. it turns out to be a "loose" wire between FPGA and acq board that is causing this problem.
