internal error:std_logic ports/signals must be width 1

Hello Farhaenis,

If u r using Quartus then goto Help and click messages. Here you see a list of possible messages that you get during compilation(errors/warnings). The error you get seems to be strange. Internal error doesn't do anything with std_logic. Anyways please check if you have any port width mismatch during instantiation. Normally internal error occurs when the compiler gets any unusual run time errors. Please check the SOPC user manual/documentation.