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Altera_Forum
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16 years ago

internal differences in fpga when using sstl_2(or sstl_18) class i and ii io standard

i am using cyclone ii fpga to interface to ddr ram. by the handbook of cyclone ii, it's top and bottom banks support sstl_2 class i and ii io standards. so what's the internal differences(just at ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

an408 and your explanation clear me a lot of questions.

thanks a lot.

there are still some points i am not sure.

in an408, it always says '... when the oct on the fpga is turned on'. so what's the meaning of 'oct is turned on'? accordingly to your explanation, the oct should be always there. what else should i do besides setting the output current to turn on the oct? or can the oct be turned off?

if the odt is turned on with a series resistor on the ddr2 side, whether or not there has oct on the fpga side is of little siginificance to me. so if the oct canbe turned off, i will just turn it off.

another point is that if class ii differs class i mainly in output current, and at the same time if i turn on the odt, i will nodoubtly choose class ii for its stronger drive capetence. you says it will be better to use 16ma in class i, do you mean the same thing? if it is, why not choose class ii directly?