internal differences in fpga when using sstl_2(or sstl_18) class i and ii io standard

Thank you for your detailed explanation.

so, you means fpga changes the effective resistor value by adjusting the output current. as to the sstl_2 class i and ii io standard, first, the output voltages are equal, so different output current results in different effective output resistor value. according to the pin assignments result in quartus, when choosing class i, the default current is 10ma, while class ii is 18ma(for sstl_18, sstl_2 is similar). by the transmission line theory, the resistors are used to enhance SI. as you say, class i's effective resistor is 50ohm, while class ii is 25ohm, then the external series resistor should be accordingly adjusted. if the transmission line characteristic resistor is 50, then class i needs no external series resistor and class ii needs an extra external 25ohm series resistor, is that right?

by the fig 10-1 and fig 10-2(see my original msg), class i and ii effective output resistor value should all be 25ohm.

well, i got confused by the handbook. i will just put an external resistor in there, and adjust its value then.

at last, i want to confirm your point again.

"as to sstl_2(sstl_18) class i and ii io standard, they differs mainly in output current(which results in different effective resistor), there is no real series or parallel resistors."

thanks a lot.