interface code

Hi Sir,

Thanks again. what i did was design cir1 and cir3 in seperate vhdl files. then i designed another vhdl file named cir2.vhd. in this i did a port map.

In cir1 we have 3 inputs and 3 outputs. while in cir3 we have 3 i/ps and 4 o/ps.

which implies cir2 shall have 3 i/ps and 3 o/ps. But when i do a port map i only need to map o/ps of cir1 to i/ps of cir2 and o/p of cir2 to i/p of cir3. This basically means that i/p to cir1 and o/p to cir3 will be left floating and i am unable to use the portmap statement.

Any suggestions sir?