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EmmaT's avatar
EmmaT
Icon for New Contributor rankNew Contributor
5 years ago

Intel SFL IP Core in top-level module used to configure serial configuration device causing ID error

Hi, I am having difficulty using the instantiated Intel FPGA Serial Flash Loader IP Core in my top level design to load newer firmware versions for the FPGA into a serial configuration device. I ...
YuanLi_S_Intel's avatar
YuanLi_S_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi Emma,


So you are saying that when you attached the JIC for FPGA only, you are able to program it. But it is not when you are attaching JIC with normal image and JIC with SFL IP?


Please clarify.


Thank You