intel_onchip_Memory II RAM: r/w doesn t work from FPGA but from HPS

Hi Guys,

please excuse me, I made such a bad mistake.
I forgot to implement the interface Signal Names to the Soc Implementation.

Now I can read and write to and from the RAM.

 // Interne Signale für RAM-Schreiblogik
reg [7:0]   ram_addr_reg;      // Adresse für On-Chip-RAM (128-Bit Wortadressierung)
reg [127:0] ram_writedata_reg; // Daten für RAM
reg         ram_write_reg;     // Write Enable für RAM
reg [15:0]  ram_byteenable_reg;// Welche Bytes im Wort geschrieben werden
reg         ram_writing;       // FSM: RAM wird beschrieben
reg [127:0] ram_readdata;
reg            ram_read;

wire [7:0] ram_1_s1_address;
wire [127:0] ram_1_s1_writedata;
wire ram_1_s1_write;
wire [15:0] ram_1_s1_byteenable;
wire ram_1_s1_read;
wire [127:0] ram_1_s1_readdata;



// Verbindungen zu Qsys-RAM-Ports
assign ram_1_s1_address    = ram_addr_reg;
assign ram_1_s1_writedata  = ram_writedata_reg;
assign ram_1_s1_write      = ram_write_reg;
assign ram_1_s1_byteenable = ram_byteenable_reg;
assign ram_1_s1_read       = ram_read;//1'b0; // nur schreiben
assign ram_1_s1_readdata   = ram_readdata;


assign ram_1_s1_clk       = fpga_clk_100;
assign ram_1_s1_reset     = fpga_reset_n;
assign ram_1_s1_reset_req = 1'b0;

Greez, idiot