Forum Discussion
ats52
New Contributor
3 months agoHello AdzimZM
Great thanks for your quick reply.
Are you using the bts design with version v15.1.2? (arria10GX_10ax115sf45_fpga_v15.1.2)
No, I'm using arria10GX_10ax115sf45_fpga_v22.4.0_v1.1.zip for BTS, which can be downloaded from this link.
https://cdrdv2.intel.com/v1/dl/getContent/649761
If you let me know the link for arria10GX_10ax115sf45_fpga_v15.1.2, I'm willing to test it as well.
For the example design you kindly sent, I have confirmed many parameters are updated from mine especially in ip/ed_synth/ed_synth_tg.ip, however, the LEDs show the same error status, thus local_cal_success and traffic_gen_fail.
I have following confirmations:
- If I suppose you have an Arria 10 GX Development Kit board, the project I attached works fine on your board?
- As far as I've looked into the installer package of arria10GX_10ax115sf45_fpga_v22.4.0_v1.1.zip, it looks only SOF files are included for BTS items, the project designs are not. Is it possible to get the project design for BTS of DDR3? Since BTS and the example design test for DDR3 make difference, I hope I will be able to find some clues if the project is available.
Thanks in advance for your reply.
Best regards,