input to IIR filter in Verilog

a of 0.7 need to be scaled up for hardware:

You can set (y) as 20 bits, (a) as 10 bits magnitude. then chop off output back to 8 bits by discarding LSBs of result(after optional rounding)

Then a = round (0.7 * 1024) = 717

(1-a)*x becomes x*1024 - x*717

the term x*1024 = x*2^10 i.e. just insert 10 zeros infront.

Figured out in a rush, I hope I am correct...