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Altera_Forum
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15 years ago

Input decay and state machine deadlock

Hello, I have an Altera device that gets an input from another board. This input drives a complex state machine. When I remove the power from the other board, the input goes low in a 5ms non-...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Yes. The problem occurs when you have inputs to a state machine that are not on the same clock domain as the state transitions. One state transition could see the input as 0 while another state transition could see it as a 1. What you did was correct in synchronizing the input.

And, a link to a possibly relevant thread on safe state machines :

http://www.alteraforum.com/forum/showthread.php?t=4566