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Altera_Forum
Honored Contributor
16 years agoIncrease input delay on clock pin - Cyclone 2
Hi, I am currently working on a Cyclone 2 ep2c35F672c6 FPGA and I don't find a solution to the following problem: I have a clock connected to the P2 pin (CLK2 pin) and I need to delay it ...
Altera_Forum
Honored Contributor
16 years agoHi dipling,
--- Quote Start --- Hi, I have a clock connected to the P2 pin (CLK2 pin) and I need to delay it with one extra nanosecond. --- Quote End --- You should use a PLL for generating clocks with a skew wrt a reference clock. PLL's can be added by the MegaWizard in your design. Hope this helps...