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I'll have to read up on the behavior of the nSTATUS pin; does this measurement sound odd at all?
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Yes. Very odd. See this document for examples of the configuration signals.
http://www.ovro.caltech.edu/~dwh/carma_board/fpga_configuration.pdf Eg. see p4 for the idealized response of the nSTATUS signal.
The document is written for PS mode, but the control signal states are the same for AS mode. The main difference is that the FPGA generates DCLK to the serial memory.
You don't have anything driving DCLK do you? Eg., you haven't put a buffer on your Active Serial header? This would cause a driver conflict and configuration would fail.
Cheers,
Dave
Honored Contributor
