Implementing CAM (Content Addressable Memory) on Cyclone III

What size do you want? What speeds? Is it Ternary(this is often a deal-breaker for larger CAMs, unless you don't mind using a ton of resources). There's a nice trick for making binary CAMs out of RAMs. I have a parameterized VHDL design for it, but I wrote it a few years ago and it targets either M4Ks or M512s. I can modify it for M9Ks, or might post-it as is for now, but am curious what your requirements are, as it might not work for you.