implementing a mux using high impedances

I did something similar on an internal level some time back when I did not know better, using Cyclone II. Quartus handles it quite well, but gives a message that it converted the structure using OR gates. As everyone agrees there is no physical structure in the FPGA internal to the FPGA to directly implement the tri-state bus. My example is still in the design and I have no intention of changing it, but I will do it differently next time.