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Altera_Forum
Honored Contributor
Honored ContributorImage Display/Processing
Hi all.
First of all, I am a beginner. I know a little of FPGA and CPLD. I have just recently studied VHDL (on my own using tutorials in the internet) and read a little about Verilog. Basically, only the coding part but I am not really good at it and its applications. Now, I have a DE1 from TerASIC and I am interested in displaying an image in my monitor through the VGA port. I already know how to make the VGA work. What I do not know is how to display an image (e.g. bmp,jpeg, etc.) I figured it must be saved to a memory then access it, but i dont know how. I also want to display text. I can do this by manually changing the color of each pixel but this is tedious. In microcontrollers, I used Font ROMs but I do not know how to implement this in VHDL. My goal is to, someday, use a camera as input, then grab a frame, and then display on the monitor. If anyone can point me to the right direction, share references, share codes (if it is not too much), or reading materials, it would be greatly appreciated. Thanks, Glenn6 Replies
Altera_ForumIs there anyone who can help me? please...
- Altera_Forum
FPGA Prototyping by VHDL Examples by Pong P. Chu can get you on the right track. Terasic also has a bmp converter tool to store raw image data in fpga ROM . But fpga's internal memory is small ... so if you want a modern graphics engine you'll going to need an sdram controller, framebuffer, sd card controller and probably NIOS processor.
- Altera_Forum
Thank you for the reply.
Just one question, though. I understand there are IP cores for sdram controller, sd card controller and nios processor.. but frame buffer? is this also included in Qsys library? Always grateful Glenn - Altera_Forum
TO anyone who can help.
Are my ideas possible without SOPC or Qsys? Just plain VHDL and Quartus II (plus MegaWizard). Thanks, Glenn - Altera_Forum
Take a look at some of the video and image processing examples
for the altera VIP cores. There are several example projects using QSYS or SOPC builder that you can take a look at to get an idea of how to use the IP cores and connect a frame buffer to SDRAM controller, etc. http://www.altera.com/literature/an/an427.pdfhttp://www.altera.com/products/ip/dsp/image_video_processing/m-alt-vipsuite.html
- Altera_Forum
thank you. i'll take a look at those pages.
Glenn
