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Altera_Forum
Honored Contributor
Honored ContributorImage Display/Processing
Hi all. First of all, I am a beginner. I know a little of FPGA and CPLD. I have just recently studied VHDL (on my own using tutorials in the internet) and read a little about Verilog. Basicall...
Altera_ForumHonored Contributor
Honored ContributorTake a look at some of the video and image processing examples
for the altera VIP cores. There are several example projects using QSYS or SOPC builder that you can take a look at to get an idea of how to use the IP cores and connect a frame buffer to SDRAM controller, etc. http://www.altera.com/literature/an/an427.pdfhttp://www.altera.com/products/ip/dsp/image_video_processing/m-alt-vipsuite.html
