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Honored Contributor
Honored ContributorI2C slave in Cyclone II device
Hi, I have written a simple I2C slave receiver in vhdl that I want to put in a cyclone II device. It is asynchronous and detects start and stops and device address + Rd/Wr and subadress. If...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- what sampling freq. should I need on my glitch filter? --- Quote End --- You can e.g.refer to the tsp value of 50 ns in the Philips/NXP I2C bus specification. But if you implement a clocked glitch filter, why not completely switch to a synchronous design, which has a much more straightforward timing scheme? To prevent from a false start condition, SDA should be filtered, too. Although a false start would be followed by a stop automatically and thus can't do much harm.
