Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I2C slave in Cyclone II device

Hi, I have written a simple I2C slave receiver in vhdl that I want to put in a cyclone II device. It is asynchronous and detects start and stops and device address + Rd/Wr and subadress. If...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hi,

okay. I just want to do some test by sending some panel data from a panelboard to my FPGA.

Later on I will try to write a good, synchronized I2C slave with buffers and all that stuff.

But for know do you think it would work if I implement some sort of glitch filter in my FPGA?

If this is so, should I filter only the SCL line or the SDA line as well? If the SCL freq.

is 200Khz, what sampling freq. should I need on my glitch filter?

Thank You!