Forum Discussion

JMasi's avatar
JMasi
Icon for New Contributor rankNew Contributor
7 years ago

I would like to know how to constrain my SPI clock on a slave. The FPGA is running as a slave to a raspberri pi master. Is it a base or virtual clock?

I have an FPGA that is running components that expose it as an SPI slave. The other master is a Raspberi pi. I am trying to write SDC constraints on SPI_SCLK and do not know where to start. I have re...
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi,

You may use "create_clock" constraint for SPI clock

For example,

create_clock -period 10 -name clk100Mhz [get_ports clk]

Thanks.