Forum Discussion
Altera_Forum
Honored Contributor
Honored Contributori dont understand this code, need your help
i found this code on the internet, they write by verilog, but im not familiar with verilog (just know about vhdl), so few things in this code that i dont understand and i need your help
/// res...
Altera_ForumHonored Contributor
Honored ContributorI haven't read the code, but shifted_ref60 <= {read_data, 2'h0} ; is the same as: shifted_ref60 <= read_data & '00'; -- e.g. concatenation
