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Altera_Forum
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8 years ago

I cant find any mistake but my compiler says its a mistake

Dear all, Please help me out her. counter <= counter + '1'; this is my instruction this is my error. So what is the mistake in it? Error (10327): VHDL error at led_blink.vh...
Altera_Forum's avatar
Altera_Forum
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8 years ago

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I think Representative is correct.

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He is correct, if code is left as is.

But Daixiwen is making the point that std_logic_(un)signed are not part of the VHDL standard, although they are supported by Quartus (and pretty much all tools). Using std_logic_unsigned goes against the spirit of VHDL.

If the user wants to switch to numeric std, then the code would need to be:

sr<=sr+1;