HW multipler custom instruction

Maybe following is too easy or too small to give the name IP http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif

Custom instruction that implements aprrox the same algorithm as the nios library for processors without dedicated multiplier.

Some benchmarks I did with :

int r;
volatile int* pr = &r; //prevent optimalisations
for (int a = -1000; a < 1000; a++)
  for (int b = 1000; b >-1000; b--)  //count backwards : prevent optimalisations
     *pr = a*b;

1. Without cutom instruction : this takes about 22.4 seconds at 50Mc with the standard NiosII

2. With the custominstruction in the mulsi function : 4.3 seconds (without frame pointer stuff)

The compiler made this :

__mulsi3:
     custom 13, r2, r4, r5
     ret

3. With the custominstruction inlined (without the additinal function call and ret instruction) : 2.4 seconds.

Unforunatly, I had to inline it inside the loop, I was not able to get the mulsi function inlined by the compiler.

If someone has suggestions, let me know

I think it is approx 280 LE&#39;s ( this was the difference when I added to an already existand custom instruction), maybe there is some extra overhead somewhere.

See also top of the verilog file for info.

Stefaan