Hi, thanks for your reply but I guess you're wrong when you say that the hps pin location assignments are necessary so that the qsys design can be reused in different Cyclone V SoC packages. It seems to me that the pin location assignments for hps-pins are actually ignored. I have tested the following:
- When I delete the pin location assignments of an ordinary FPGA pin, the fitter will give me warnings about missing location assignments.
- When I delete the pin location assignments of I2C0 pins, the fitter does not complain about locations, it just complains about missing drive strength and slew rate.
Therefore, my current theory is that I have to export the hps_io pins so that they "exist" in quartus and it will be possible to configure drive strength and slew rate. But I could imagine that these values will be ignored, too?
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