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Altera_Forum
Honored Contributor
11 years ago --- Quote Start --- https://www.alteraforum.com/forum/attachment.php?attachmentid=9331 The above shows the memory mapping of the FPGA into the ARM. Your FPGA has access to the physical address of the HPS SDRAM starting from 0x10_0000. Note however that the Qsys Avalon address bus to the HPS SDRAM port is only 29 bits wide instead of 32 bits. Thus, you can only access memory up to address 0xa000_0000 from the FPGA. I recommend you look at the Macnica online video http://www.macnica-na.com/vworkshops/courses-altera-soc for a great tutorial on this subject. --- Quote End --- Hi WH2011! Thank you so much for introducing the great website like this. It's very useful for me I would like to share something about my project with you:Firstly, I use a camera TRDB D5M of altera, the picture from camera will be stored at DDR3-FPGA, then displaying VGA. My result is good, Attached image below is my design system in Qsys. Now, I would like to use HPS in my design. I intend to read data from DDR3-FPGA to save DDR3-HPS, then Frame Reader will be read this data and output to VGA. How do you think about my ideal, if it is possible or not. Best Regards!https://www.alteraforum.com/forum/attachment.php?attachmentid=9332