How to use Shared pll in LVDS transmiter and resceiver functions

Just like the following codes:

module lvdsTransceiver(

input sysclk,

input reset,

input [19:0] txIn0,

input [19:0] txIn1,

input [19:0] txIn2,

input txIn_clk,

output [2:0] txOut,

output txOut_clk,

input rxIn0,

input rxIn1,

input rxIn2,

input rxIn_clk,

output [19:0] rxOut0,

output [19:0] rxOut1,

output [19:0] rxOut2,

output rxOut_clk0,

output rxOut_clk1,

output rxOut_clk2

);

lvdsTxr lvdsTxr_inst (

.pll_areset(reset),

.tx_in ( {txIn2,txIn1,txIn0} ),

.tx_inclock ( txIn_clk ),

.tx_coreclock ( ),

.tx_locked ( ),

.tx_out ( txOut ),

.tx_outclock ( txOut_clk )

);

lvdsRxr lvdsRxr_inst0 (

.pll_areset ( reset ),

.rx_in ( rxIn0 ),

.rx_inclock ( txIn_clk ),

.rx_locked ( ),

.rx_out ( rxOut0 ),

.rx_outclock ( rxOut_clk0 )

);

endmodule