Forum Discussion
New ContributorHow to switch Transceiver transmitter PLL
Hi,
As I understand it, you have some inquiries related to the TX PLL switching in the Native PHY. I believe you are referring to A10 devices. If yes, as I understand it from the user guide, to switch to tx_serial_clk0, the 8 bit mapping should be:
{~logical_PLL_offset_readdata[3], logical_PLL_offset_readdata[1:0],logical_PLL_offset_readdata[3], logical_PLL_offset_readdata[3:0] }
With the read back value = 0xB -> 4'b 1011, after encoding, the value should be 8'b 0111 1011 -> 0x7B instead of 0xFB. Please help to correct me if I have encoded this incorrectly.
Thank you very much.
Best regards,
Chee Pin
Regular ContributorHi,
As I understand it, you have some inquiries related to the TX PLL switching in the Native PHY. I believe you are referring to A10 devices. If yes, as I understand it from the user guide, to switch to tx_serial_clk0, the 8 bit mapping should be:
{~logical_PLL_offset_readdata[3], logical_PLL_offset_readdata[1:0],logical_PLL_offset_readdata[3], logical_PLL_offset_readdata[3:0] }
With the read back value = 0xB -> 4'b 1011, after encoding, the value should be 8'b 0111 1011 -> 0x7B instead of 0xFB. Please help to correct me if I have encoded this incorrectly.
Thank you very much.
Best regards,
Chee Pin
New ContributorYes that was my mistake. I did not realize ~ notation meant NOT bit 3. It now works correctly. Thank you
