Forum Discussion
Sijith
Occasional Contributor
Occasional ContributorHow to simulate a design created in Platform Designer System
As I am comparatively new to Quartus Prime, I would like to know how to simulate my design that is created using Platform Designer System. I would like to elaborate a bit: my counter.v module is co...
Hi,
The testbench counter_fifo_tb.v that I sent to you before is just an example. If you want to get proper output waveform, you have to change a bit on the stimulus.
Below attached the edited testbench and proper output waveform image. As for the functionality, probably you still need to further verify from your side.
Thanks,
Best Regards,
Sheng
SijithOccasional Contributor
Occasional ContributorHi Sheng,
Recently I have got a mail from Intel community that suggesting to open a new thread. If I want to raise my latest question as a fresh case, I am afraid that I may have to summarize the whole discussion here the new thread too. Is there any other way to circumvent this?
