Forum Discussion
Occasional ContributorHow to simulate a design created in Platform Designer System
Hi,
The testbench counter_fifo_tb.v that I sent to you before is just an example. If you want to get proper output waveform, you have to change a bit on the stimulus.
Below attached the edited testbench and proper output waveform image. As for the functionality, probably you still need to further verify from your side.
Thanks,
Best Regards,
Sheng
Super ContributorHi,
This video and this link https://www.macnica.co.jp/en/business/semiconductor/articles/intel/133550/ will show you how to simulate ip in Quartus Prime Pro Edition. First in Platform Designer, you have to generate the simulation model. Next after full compilation, have to generate combined simulation setup script for IP. Then create a .do file to source the combined simulation setup script and also compiled all the related design files, testbench (Note: testbench need to be created as well). Last, execute macro to run simulation.
Thanks,
Best Regards,
Sheng
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.
Occasional ContributorI assume the method in the link above works for a design containing multiple IP's (not just one IP) connected with avalon interfaces (streaming and MM). I am afraid that I could not comprehend well 3:40 of the video posted (In the documentation,
"vlog <compilation options> <design and testbench files> Add command to compile all user design files and testbench files except IP design.)
the testbench files and design files here means the .v files in the "Project Folder/projectname_tb/" folder? And design files from "Project Folder/ip/projectname/projectname_ipcomponent folder/synth" and "Project Folder/projectname/synth" folder ? Also, "except IP design" in above quote means .v files of IP's or .ip files?
My doubt is whether the user have to write some code additionally (like the testbench toplevel module "tb" mentioned in the video, or we just have to collect all necessary codes from different folders (that created while executing "generate testbench" option?) and add them in <design and testbench files> entry in the .do file?
