XQSHENOccasional Contributor5 years agoHow to set timing constraint to uart uart is used as interface of external device. And this device has it's owner clock. When doing timing constraint, should I set uart rxd and txd as false path? or setting timing constraint using virt...Show More
XQSHENOccasional Contributor5 years agoYes. They are two individual device using uart to communicate. FPGA ------uart---------external device(wifi module).
XQSHENOccasional Contributor to XQSHEN5 years ago1. FPGA has its own clock 2. Wifi module has its own clock
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