XQSHENOccasional Contributor5 years agoHow to set timing constraint to uart uart is used as interface of external device. And this device has it's owner clock. When doing timing constraint, should I set uart rxd and txd as false path? or setting timing constraint using virt...Show More
XQSHENOccasional Contributor5 years agoYes. They are two individual device using uart to communicate. FPGA ------uart---------external device(wifi module).
XQSHENOccasional Contributor to XQSHEN5 years ago1. FPGA has its own clock 2. Wifi module has its own clock
Recent DiscussionsError (209014): CONF_DONE pin failed to go high in device 1.Implementation of lower data rate.eFUSE : Agilex F series and AGilex I series PCIe cardIP components used in the design have conflicting settings. Intel PCIE Ftile MCDMAEP4CGX22CF19C8N Failure Short D8 to C8