How to set clock controller in BTS (board_test_system) for 32G (NRZ) MXP BTS example
Dear support: We expect the Agilex 7 FPGA I-Series F-Tile. All four channels can run at 32G NRZ and 58G PMA4. Currently, we use the factory default setting, and MXPM can run at 25.78118G without er...