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Altera_Forum
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15 years agoHow to receive LVDS signals from ADC?
Hello everyone, I'm going to design my first FPGA board(EP2C50) with 14bits ADC(AD9445). There are 14 groups of two differential traces going to FPGA I/O ports with 100-Ohm termination resistor be...
Altera_Forum
Honored Contributor
15 years agoOpen your project, then open the Pin Planner. In the cell containing <new node> enter a new group name for your differential signals, say D[13..0]. Pin Planner will add the 14 signals for you in a separate row each. Then in the IO standard column set it to LVDS. The Pin Planner will now create the complement pin for that signal -> D[*](n). If you later place the positive pin on a (valid) location in the pin diagram it will nicely take the complement signal along and place that as well. In your logic you just connect the D[*] pins in your entity.