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Hello everyone,
I'm going to design my first FPGA board(EP2C50) with 14bits ADC(AD9445). There are 14 groups of two differential traces going to FPGA I/O ports with 100-Ohm termination resistor between the two signals at the FPGA's input buffer. Or we can say there are two groups of 14bits digital signals. But I'm now puzzling that how can I get the 14bits digital signals in the FPGA?
One of my colleagues suggests that I can substract Dx- from Dx+ to get Dx( x from 0 to 13) with HDL code. I wonder if there are better ways to figure out this problem? Thanks a lot!
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See ALTLVDS megafunction.
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