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Altera_Forum's avatar
Altera_Forum
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11 years ago

How to read data from a memory location where ADC conversion result is stored?

Hi, I am trying to use my ADC to sample an analog voltage. I used Qsys to design ADC modular core and was able to see the conversion result using ADC Toolkit. Now, I want to use this ADC conversi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

I assume you're not using Nios. So, in Qsys configure your ADC core for 'ADC control core only'. You may well be doing this anyway. Then make sure you've exported the 'command' and 'response' Avalon Streaming interfaces. Then, when you generate your HDL, you'll end up with a set of command & response signals to connect into your design.

Then refer to figure 2-6 on page 2-9 of the max 10 analog to digital converter user guide (https://www.altera.com/literature/hb/max-10/ug_m10_adc.pdf). This shows you the timing for the Avalon streaming interfaces - which you exported - that you need to connect into your logic. You'll find your samples on the 'response_data' bus, valid when 'response_valid' indicates so.

Cheers,

Alex